Kashyap Gohel

As a Design for Test engineer, I apply my skills and knowledge in scan insertion, ATPG, and simulation to integrate DFT techniques into complex designs, optimize test coverage, and ensure high product reliability. I have hands-on experience in industry-leading tools and methodologies, such as Tessent and Synopsys, to deliver efficient and effective testing solutions.

I am passionate about driving innovation and contributing to the success of cutting-edge projects in the semiconductor industry. I am eager to learn new technologies and advance my career as a DFT Engineer.