To work in challenging environments that demand all my efforts to explore and adapt myself in different fields and contribute to my project as well as engineering knowledge to fulfill company’s objectives in their project development.
System Verilog -SV-L1
I hereby declare that the above cited information is true to the best of my knowledge, and I bear the responsibilities for the correctness of the above-mentioned particulars. [Pallavi Nikam]
VLSI ASICVerification- L1
System Verilog -SV-L1