Rachel Beatris Veluvali
Functional Safety Engineer
Bengaluru
Summary
I'm a design engineer with over 3 years of specialized experience in automotive hardware functional safety, particularly adhering to ISO 26262 standards. My expertise includes working with the RH850/MCU family and SA80001 Camera serializer/deserializer, focusing on RTL design and netlist. Currently, as a Functional Safety Analyst at ACL Digital Semiconductor, I am dedicated to advancing safety applications and ensuring compliance with stringent safety standards.
Overview
4
4
years of professional experience
Work History
Design Engineer
ACL Digital Semiconductor
04.2025 - Current
- Experience: 1 year as a functional safety analyst at Silicon Auto in hardware functional safety, focusing on ISO 26262 standards for SA 80001 Camera SER/DES.
- Skills: Expertise in the functionality of RTL design, netlist, and MIDAS tools for safety-critical applications.
- Responsibilities: Addressed design challenges, and evaluated alternative design models to meet project requirements.
- Analyses: Perform Failure Modes, Effects, and Diagnostic Analysis (FMEDA), Dependent Failure Analysis (DFA), Design Failure Mode and Effects Analysis (DFMEA), TSR, and HSR to enhance system safety.
- Tools: Utilize MIDAS tools for calculating the FIT metrics, and to improve safety compliance.
Senior Engineer
Tata Elxsi pvt Limited
06.2022 - 04.2025
- Experience: 2 years and 9 months as a functional safety analyst at Renesas Europe in hardware functional safety, focusing on ISO 26262 standards for RH850/MCU systems.
- Skills: Expertise in RTL design, Netlist and CAR tools for safety-critical applications.
- Proficiency: Experienced with U2B6, U2B10, and U2B24-E variants, ensuring robust safety and compliance.
- Responsibilities: Lead requirement analysis, development, and optimization of functional safety applications.
- Analyses: Perform Dependent Failure Analysis (DFA) and Failure Modes, Effects, and Diagnostic Analysis (FMEDA) to enhance system safety.
- Tools: Utilize CAR tools for coverage reporting and microcontroller analysis to improve safety metrics and compliance.
- Achievements/Tasks
Education
Master of Technology - VLSI Design
Karunya Institute of Technology and sciences
06-2022
Bachelor of Technology - Electronics and Communication
Karunya Institute of Technology and sciences
05-2020
Skills
VLSI Design: Extensive experience in RTL, netlist, and analog CMOS VLSI design, including CMOS and Verilog HDL
ACHIEVEMENTS
“Low Power CMOS Voltage Reference Circuit for High-Efficient Power Management Chips” Published in 6th International Conference on Devices, Circuits and Systems (ICDCS), 2022
Timeline
Design Engineer
ACL Digital Semiconductor
04.2025 - Current
Senior Engineer
Tata Elxsi pvt Limited
06.2022 - 04.2025
Bachelor of Technology - Electronics and Communication
Karunya Institute of Technology and sciences
Master of Technology - VLSI Design
Karunya Institute of Technology and sciences