Samuel Rachapudi

Tools Used : SgDft, CDC, SCF, git (Version Control), genesis (for RTL), Lucid Chart

Role : Primarily responsible for making sure SgDft is clean for all Milestones for the sub-system and all its child partition Blocks

Description:

sswrp_aoss is always on subsystem which is further divided to Full Always On and

switchable Always On. It uses ARM Processor (A32), Cadence DSP Processor (HF5), SiFive Processor (E24) and memories for implementing the same.

Responsibilities :

• Ensure that SGDft is clean for all partitions and milestones by updating constraints, waivers, and making necessary design adjustments using Genesis tool, and analyzing design with Spyglass GUI wherever required
• Updating integration.tcl file which deals with creating new connections whenever there is new lpcm in Design in tessent stage.
• Triggered Lint and CDC for sswrp_aoss and update constraints wherever relevant.
• Additionally responsible for release of all blocks (8 Partitions) for all Milestones.
• Triggered fedft_lite runs for released Tags and check if TAGs are good for basic QCs

Tools Used : Lint, CDC, Clearcase Tool(Version Control), QNoC

Role : Implementing NoC at each Design Stage

Description:

• Teach porting of Kuno GIC_NoC and DC_NoC to Bigbend.
• Palawan QTB_NoC implementation from creating Directory structure while importing to P3 release. Responsible for delivering Uflow – (PLDRC,CDC,CLP,QBAR) clean baselines to Verification Team.
• Nordschleife hsc_noc importing pakala gem_noc and delivering initial uflow clean baseline to Verification Team.

Tools used: Jump, Python Tkinter

Responsibilities:

• This project involves working on a Memory Controller IP that sits between the processor and storage memory.

• Analyze the results for iterations using Jump Tool.

• Build GUI on top of regression results to view results in any manner of execution.

• Analyze Design Architecture of Memory Controller in detail.

• Analyze regression results using Jump Tool, capturing them in PPTs.

• GUI which can access multiple regression runs and making it capable of producing results between runs

Tools used: Spyglass Low Power and Lint

Role: Tool flow Methodology (TFM) based project, which involves working with tools.

• This project involves running various Intel compatible for Caliber tool is for checking timing related checks in design.
• Spyglass Lint tool can help fast method to improve quality of code and syntax errors
• To run each tool with respect of their commands and analyze waivers from rule guide description and update waivers if required for each Milestone
• Tanner ridge used for low end network applications.

Lint: Run tool, go through violations. Fix them or add relevant waivers for various scenarios, to name a few case statement syntax, out of boundary range issues, driven and un-driven signals violations, fixing nonsynthesizable statements

Low Power: I was responsible for low power design elements related checks and analyze errors and fix any issues that arises. These include analyzing power modes and domain of operation of each Design Block ensuring their intended signal flow while crossing one power domain to other power domain and place any low power Design elements that are missing and modify upf according to scenario.

Tools used: Zircon QA Description:

Role: Ensure if all design checks are met, coordinate among team mates and update the consolidated results to client.

• Zircon QA is a quality assurance tool which serves as a checklist of all Design aspects of all IPs.

• Analyze the type of IP and collect the information of various design QCs like cdc , emulation to name a few, ensure all the files that should be generated on successful run.