Saurabh Tanwar
Ahmedabad
Summary
Results-driven ASIC Verification Engineer with 6 of experience in verifying complex digital designs for various applications. Seeking a challenging position in a progressive company where I can utilize my expertise in ASIC verification methodologies, testbench development, and problem-solving to ensure the delivery of high-quality semiconductor products.
Overview
1
1
Language
12
12
years of professional experience
Work History
ASIC Verification Engineer
Blueberry Semiconductor
Ahmedabad
03.2018 - Current
- Conducted constrained-random and directed testbench simulations, regression testing, and coverage analysis to ensure robust verification of digital designs.
- Implemented and maintained verification methodologies, ensuring alignment with industry standards and best practices for robust design verification.
- Developed reusable verification components and testbenches, accelerating verification cycles and enhancing overall productivity.
- Investigated and debugged simulation failures, working closely with design engineers to resolve issues and improve design quality.
- Performed code and functional coverage analysis and reported results to project stakeholders.
- Collaborated with cross-functional teams, facilitating successful integration of verified ASICs into larger systems, enhancing project outcomes.
ASIC Trainee
01.2015 - 01.2018
- Contributed to the verification of high-speed communication ASICs, focusing on protocol compliance, data integrity, and performance.
- Developed test plans and verification strategies for complex digital blocks, including CPUs, memory controllers, and peripherals.
- Participated in FPGA prototyping and emulation of ASIC designs to accelerate verification efforts.
- Collaborated with software engineers to validate ASIC functionality and performance through software-driven verification.
- Worked on low-power verification methodologies and techniques to optimize power consumption in ASIC designs.
- Mentored junior verification engineers and provided guidance on verification processes.
Education
MENG - Semiconductor Fabrication, Thermoelectric Devices, Trust in Digital Hardware, Fundamentals of MEMS, Introduction to Sensors, Biosensors and Bioelectronics, Advance MEMS Devices, Biomedical Microsystems, Effectiveness in Technical Organizations, Innovation Design Thinking
University of Cincinnati
Cincinnati, OHMaster of Science - Electrical Engineering
Texas A&M University
Kingsville, TXMENG - Physics of MOS Transistor, Digital Signal Processing, Analog CMOS Circuit Design, Mixed CMOS Circuit Design, Advance Image Processing, VLSI Signal Processing, Operation Research, VLSI Technology
Gujarat Technological University
AhmedabadSkills
- ASIC Verification Methodologies (UVM, OVM, VMM)
- SystemVerilog and Verification Languages
- Testbench Development
- C, C
- GPU , CPU experience
- Coverage-Driven Verification
- FPGA Prototyping and Emulation
- Scripting (eg, Python, Perl)
- Simulation Tools (eg, Cadence, Synopsys, Mentor Graphics)
Skills
ASIC Verification Methodologies (UVM, OVM, VMM), SystemVerilog and Verification Languages, Scripting (e.g., Python, Perl), Simulation Tools (e.g., Cadence, Synopsys, Mentor Graphics), Testbench Development, Coverage-Driven Verification, FPGA Prototyping and Emulation
Languages
English
First Language
Timeline
ASIC Verification Engineer
Blueberry Semiconductor
03.2018 - Current
ASIC Trainee
01.2015 - 01.2018
MENG - Semiconductor Fabrication, Thermoelectric Devices, Trust in Digital Hardware, Fundamentals of MEMS, Introduction to Sensors, Biosensors and Bioelectronics, Advance MEMS Devices, Biomedical Microsystems, Effectiveness in Technical Organizations, Innovation Design Thinking
University of Cincinnati
Master of Science - Electrical Engineering
Texas A&M University
MENG - Physics of MOS Transistor, Digital Signal Processing, Analog CMOS Circuit Design, Mixed CMOS Circuit Design, Advance Image Processing, VLSI Signal Processing, Operation Research, VLSI Technology
Gujarat Technological University