Summary
Overview
Work History
Education
Skills
Certification
References
Timeline
Generic

SHANMUKH SJ

Bangalore

Summary

Physical Design Engineer with 8.5 years of experience in delivering innovative solutions under tight deadlines and budget constraints. Proven ability to analyze project requirements and implement precise design strategies. Recognized for resilience and proactive approach in dynamic environments, consistently exceeding project objectives.

Overview

7
7
years of professional experience
1
1
Certification

Work History

Staff Engineer, Physical Design

Synopsys Inc.
Bangalore
11.2021 - Current
  • Spearheaded P&R New Product Featurization and Evaluation projects to drive innovation in design processes.
  • Directed extensive efforts on critical designs for PPA Push and FMAX Push initiatives.
  • Managed ownership of IRDP Convergence Flow and Freeze Silicon Flow, focusing on stability improvements.
  • Optimized designs to integrate new technologies, achieving reduced turnaround times in graphics design.
  • Facilitated product and methodology testing for various programs, playing a pivotal role in client success.
  • Provided mentorship to new AEs, accelerating their proficiency in essential workflows.

Sr.Engineer

Mirafra Technologies
Bangalore
01.2021 - 11.2021
  • Executed full-scale implementation of designs for two projects, N5 and N7.
  • Implemented best practices in engineering standards and procedures.
  • Assumed complete ownership of design processes, ensuring compliance with all sign-off checks including STA, IR, and PV.
  • Converged designs efficiently, developed ECOs, and delivered clean GDS to SoC teams.
  • Provided end support to peers during Tape-Out stages to meet TAT deadlines and enhance team quality.

Sr.Engineer

Si2Chip Technologies
Bangalore
01.2019 - 12.2020
  • Executed physical design flow from floorplanning to sign-off for SOC and IP teams.
  • Delivered multiple designs on time, adhering to strict turnaround time deadlines across tech nodes.
  • Participated in several tape-outs, ensuring designs met quality and timing requirements.
  • Developed scripting skills to optimize sign-off flows and enhance backend implementation.
  • Implemented engineering standards and best practices to improve overall design processes.

Physical Design Engineer

Samsung
Bangalore
01.2018 - 01.2019
  • Executed Physical Design Flow from initial floorplanning through sign-off for SOC and IP projects.
  • Ensured design delivery met strict turnaround times for nodes within 7nm to 22nm range.
  • Facilitated timely project completion by overseeing multiple tape-out processes.
  • Conducted research on advancements in Physical Design technologies to enhance project outcomes.

Education

Advanced Diploma in Physical Design - ASIC Design

RV VLSI Design Center
Bangalore, India
01.2017

M.Tech - VLSI Design

S.R.M University
Tamilnadu, India
01.2016

B.Tech - ECE

JNTUK
Andhra Pradesh, India
01.2014

Skills

  • Sound RTL to GDSII flow knowledge
  • Expertise in multi-EDA tools: Fusion Compiler, ICC2, PrimeTime and Innovus tools
  • Sign-Off Concepts and Tools: Tweaker (PC), Mentor-Calibre, Ansys Redhawk tool
  • Low-power design strategies
  • Effective communication and teamwork skills
  • Automating Design methodologies for efficiency and throughput

Certification

  • Chiplets: Building the Future of SoCs, 07/01/24
  • Advanced Diploma in Physical Design, RV-VLSI, 01/01/17

References

References available upon request.

Timeline

Staff Engineer, Physical Design

Synopsys Inc.
11.2021 - Current

Sr.Engineer

Mirafra Technologies
01.2021 - 11.2021

Sr.Engineer

Si2Chip Technologies
01.2019 - 12.2020

Physical Design Engineer

Samsung
01.2018 - 01.2019

Advanced Diploma in Physical Design - ASIC Design

RV VLSI Design Center

M.Tech - VLSI Design

S.R.M University

B.Tech - ECE

JNTUK

Similar Profiles

CREATE PROFILE
SHANMUKH SJ