Yaswanth Maddali
Hyderabad , Manikonda
Overview
3
3
years of professional experience
Work History
Sr ASIC Digital Engineer
Synopsys
2023 - Current
- Contributed to eight PCIE Subsystem Projects alongside one Multi Protocol Project.
- Assisted in design verification for two projects, ensuring adherence to specifications.
- Acquired extensive experience with both Dual Mode and PHY Only Subsystems.
- Performed comprehensive testing on various PCIE scenarios including enumeration, link down, and error situations. Led efforts on link speed adjustments, lane reversal, FLR, SRIOV configurations, PFs, and VFs.
- Created top wrapper scripts while facilitating test bench integration for improved performance.
- Utilized formal verification techniques for thorough connectivity assessment in projects.
- Reviewed multiple VPLANs to guarantee effective verification processes.
Intern
Synopsys
06.2021 - 07.2023
- Analyzed problems and worked with teams to develop solutions.
- Sorted and organized files, spreadsheets, and reports.
- Explored new technologies and approaches to streamline processes.
- Participated in workshops and presentations related to projects to gain knowledge.
Education
Master of Science - VLSI Design
National Institute of Technology
Puducherry 2023
Bachelor of Science - Electronics And Communication Engineering
Chennai Institute of Technology
Chennai2021
High School Diploma - Maths & Science Group
Narayana Jr College
Nellore 2017
Skills
- Verification - Verilog, SystemVerilog, and UVM
- Protocols - APB, AXI, AHB and PCIE
- Scripting - Python and Perl
- AI and ML models
- Formal verification - VC Formal
- Tool knowledge - VCS
Languages
Telugu
Bilingual or Proficient (C2)
Tamil
Advanced (C1)
English
Advanced (C1)
Hindi
Advanced (C1)
Interests
- Cricket and Badminton
- Investments
- Cars
Timeline
Intern
Synopsys
06.2021 - 07.2023
Sr ASIC Digital Engineer
Synopsys
2023 - Current
Master of Science - VLSI Design
National Institute of Technology
Bachelor of Science - Electronics And Communication Engineering
Chennai Institute of Technology
High School Diploma - Maths & Science Group
Narayana Jr College
Similar Profiles
Ravi BullaRavi Bulla
R&D Engineering,Memory Design Engineer at synopsysR&D Engineering,Memory Design Engineer at synopsys
Susheela HegdeSusheela Hegde
Firmware Verification Engineer Intern at SynopsysFirmware Verification Engineer Intern at Synopsys
RAMA KRISHNA MEDARAMA KRISHNA MEDA
Staff Design Engineer at SynopsysStaff Design Engineer at Synopsys
Suman SudagoniSuman Sudagoni
Technical Lead/ Project Lead Engineer at OSI Systems pvt Ltd (Rapiscan Systems and AS&E)Technical Lead/ Project Lead Engineer at OSI Systems pvt Ltd (Rapiscan Systems and AS&E)
KIRAN KUMAR REDDYKIRAN KUMAR REDDY
Sr.Manager (Sales Head) at PACIFICA COMPANIESSr.Manager (Sales Head) at PACIFICA COMPANIES