CHARLES DANIEL RAJENDRA
Summary
Proven ability to lead cross-functional teams in design, development and implementation of complex projects. Organized and dependable candidate successful at managing multiple priorities with a positive attitude. Willingness to take on added responsibilities to meet team goals. To seek and maintain full-time position that offers professional challenges utilizing interpersonal skills, excellent time management and problem-solving skills.
Overview
5
5
years of professional experience
1
1
Certification
Work History
Physical Design Engineer
Sumedha Design Systems Pvt Ltd
Hyderabad
12.2017 - Current
Initially, worked as an instructor on TCL and UNIX scripting. Prepared modules for the corporate trainees, which can help them in applying the scripting concepts in workflows of Synthesis and PnR.
Since three years working on ICC2 and DC and implemented projects on 14nm and 28nm designs.
Mainly worked on Optimization of blocks with respect to timing during Synthesis.
Brainstormed with Design engineers to define SDC files to provide proper constraints for better timing analysis.
Provided solutions in writing better scripts in TCL for the Prime Time and Design compiler tools
Trained atleast 100 people till today on Design compiler and ICC2 compiler.
Currently, leading a team of 5 PD engineers to work on multi-voltage design.
Education
Master of Technology - VLSI SYSTEM DESIGN
JNTU-H
Hyderabad01.2017
Bachelor of Technology - Electrical, Electronics And Communications Engineering
St. Mary's College of Engineering & Technology
Hyderabad04.2007
Skills
TCL scripting
Unix Shell Scripting
SDC Object access commands
Optimization techniques during Synthesis, Floorplanning, Placement, CTS and Routing stages
Reasonably strong analytical and quantitative skills
Good in understanding RTL design; worked on VCS compiler for 6 months
Certification
Synopsys certification on TCL scripting
NPTEL certification on Digital design using Verilog
Additional Information
I am a very good team player. I can do my best if given a task related to writing script from Synthesis to PNR.
Languages
Hindi
Bilingual or Proficient (C2)
English
Bilingual or Proficient (C2)
Telugu
Intermediate (B1)
Oriya
Intermediate (B1)
Timeline
Physical Design Engineer
Sumedha Design Systems Pvt Ltd
12.2017 - Current
Master of Technology - VLSI SYSTEM DESIGN
JNTU-H
Bachelor of Technology - Electrical, Electronics And Communications Engineering
St. Mary's College of Engineering & Technology
Synopsys certification on TCL scripting
NPTEL certification on Digital design using Verilog
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